Verilog PDP-11; FAQ & Reproduce Info

Verilog PDP-11

If you want to reproduce the FPGA pdp-11 you'll need the following:

  • the verilog RTL (below)
  • Digilent S3BOARD with S31000 FPGA ($49 upgrade to $119 board)
  • IDE adapter board (you need to make one)
  • IDE disk with RT11 loaded on it.
  • Xilinx ISE; I used 8.2i because I had it installed, 9 or 10 should work fine
  • Xilinx JTAG pod; I used the USB pod but a parallel one will work fine

The verilog RTL is below. I can make a zip of the ISE project. The ".ucf" file is in the rtl directory, which is really the only part you need to make a new project.

The IDE disk is just a stock IDE disk. I plugged it into a linux computer and did a straight "dd" copy of the RK05 RT11V4 image in the rtl directory to it. i.e. "dd if=rk.dsk of=/dev/sdd". The RK module (rk_regs.v) does a direct mapping of RK blocks to lba blocks just like simh does. Any simh rk05 image should work fine.

The IDE adapter board is just wiring. It connects the S3BOARD A2 connector to a stock IDE cable. I plan to whip up a simple pcb using Eagle. I can make extras if anyone is interested.

S3BOARD, A2 connector:

Signal	Conn	      Conn	Signal
--------------------------------------
	GND	1 2   +5v	power for pullups
	+3.3v	3 4   E6
d7	D5	5 6   C5	d8
d6	D6	7 8   C6	d9
d5	E7	9 10  C7	d10
d4	D7	11 12 C8	d11
d3	D8	13 14 C9	d12
d2	D10	15 16 A3	d13
d1	B4	17 18 A4	d14
d0	B5	19 20 A5	d15
	B6	21 22 B7
	A7	23 24 B8
iow	A8	25 26 A9	cs0
ior	B10	27 28 A10	cs1
	B11	29 30 B12	da0
	A12	31 32 B13	da1
	A13	33 34 B14	da2
	D9	35 36 B3
	R14	37 38 N9
	T15	39 40 M11

pu = 1k pullup to +5 on S3 connector

IDE

Signal  IDE           IDE       Signal
--------------------------------------
pu	reset	1 2   gnd	gnd
d7	d7	3 4   d8	d8
d6	d6	5 6   d9	d9
d5	d5	7 8   d10	d10
d4	d4	9 10  d11	d11
d3	d3	11 12 d12	d12
d2	d2	13 14 d13	d13
d1	d1	15 16 d14	d14
d0	d0	17 18 d15	d14
	gnd	19 20 (key)
gnd	dmarq	21 22 gnd	gnd
iow	diow-	23 24 gnd	gnd
ior	dior-	25 26 gnd	gnd
	iordy	27 28 csel	gnd
pu	dmack-	29 30 gnd	gnd
	intrq	31 32 iocs16-	
da1	da1	33 34 pdiag-
da0	da0	35 36 da2	da2
cs0	cs0-	37 38 cs1-	cs1
	dasp-	39 40 gnd	gnd

Snapshot #1 - no mmu, boots RT-11:

Latest files - works in sim, but not on fpga: