My first attempt at controlling and responding to the UNIBUS was via a simple "async" cpld. No clock, just raw logic inside a CPLD. I wanted to do as much as possible via software and see how far I could get.
I found that I could get things to work, almost, but not as fast as I wanted. Still, I got RT11 to boot.
Here's the verilog; very rough, just a prototype with a simple test bench.
Here are some pictures from my HP1650A, taken from signals on the udisk board. Sorry for the crooked images; they are scans of printouts of screenshots.
Below are: