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Udisk

udisk - universal disk controller for UNIBUS

random lab picture

Update - 11/2013

The initial revision of the PCB and software are finally working. After a very long hiatus (about four years), I dusted off the original pcb and plugged it into my 11/34a. When I last worked the board it was flakey and it would barely boot RT11. Other operating systems failed. There were issues with interrupts.

I decided to get serious this time. I used a logic simple logic analyzer and a simple JTAG pod to debug it. I got disciplined and finally worked out the issues with the CPLD and ARM code. I had some bugs in my CPLD state machine and some mistakes in my implementation of the bus protocol on the ARM side. After seeing them on the logic analyzer, it was obvious.

The card now boots everything I have tried while acting as an RL02 disk. I also have code for RK05 emulation. I have booted RT11, RSTS V7.2, XXDP 2.5 and BSD 2.9. That's a pretty good sample of different behavior.

I also added a small boot loader which allows the flash to be updated via the USB port. It supports the standard "sam-ba" protocol over USB, acting as an ACM device.

I want to try emulation of larger disks, and possible MSCP next. Both should be pretty easy to add.

I have updated the schematics and code files. I plan to fab a new PCB with all the corrections shortly. I will probably make 4 in the next run and would be willing to part with two of them. The PCB's are (as I recall) about $250 each, so the completed boards will be about $300.

Background and Motivation

I've been frustrated with large disks connected to unibus machines. They are often complex and failure prone. SCSI solves this (and many other problems) to a large extent but the controllers are expensive.

I wanted to try my hand at some UNIBUS hardware and decided to make a disk controller emulator. The udisk project attempts to make a generic disk controller device controlled by firmware which can be used to emulate virtually any disk controller. It can be a bus master, bus slave and generate interrupts. It can also act as a boot ROM or generic RAM.

The software is still very early and currently only emulates a RL11 controller and RL02 disks. But eventually I plan to do RK11 and UDA-50 also. In fact, virtually any controller can be emulated, as can RAM and ROM.

What the board contains and does

  • ARM7 cpu + Xilinx CPLD
  • CF disk interface
  • IDE disk interface
  • USB function interface
  • Serial port + DB9
  • 3 LED's
  • JTAG port
debugging udisk card in pdp11

Here'a picture of the prototype all strapped in on an extender card in my 11/44.

(:comment IM001597.JPG IM001598_30pct.JPG IM001598.JPG :)

The cpu operates at 48mhz and has full access to the UNIBUS. It fields as registers accesses and controls DMA to/from the UNIBUS. I wrote a simple serial port "command line interface" which allows me to do things like load the RL02 bootstrap into memory and run various diagnostics and tests.

Original Attempt, circa 2008

The first prototype board had some serious flaws in the power plane, but I was able to use "air wires" to fix all of them. The cpu worked fine as did the CF fisk. I implemented a simple async CPLD with basic firmware and got RL11 emulation working enough to boot RT11.

I found the cpu overhead was too high during repeated status register reads so next implemented a more modern synchronous (i.e. clocked) version of the CPLD. It uses several simple state machines for register access and DMA. It works much better and offloads the cpu quite a bit.

I scanned some screen shots from the logic analyser of various UNIBUS bus transactions, along with the verilog code for the simple async cpld. Here's a page describing the async cpld prototype The newer sync cpld is in the current code tar file along with a testbench.

Files

Revision 3

Revision 1

Revision 0

Links


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